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<title>Open Graphics Project</title>

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</style><table class="infobox vcard"><tbody><tr><th colspan="2" class="infobox-above summary">Open Graphics Project</th></tr><tr><th scope="row" class="infobox-label">Commercial?</th><td class="infobox-data">Yes</td></tr><tr><th scope="row" class="infobox-label">Type of project</th><td class="infobox-data">Open hardware</td></tr><tr><th scope="row" class="infobox-label">Website</th><td class="infobox-data"><span class="url"><a rel="nofollow" class="external text" href="http://web.archive.org/web/20100609075313/http://wiki.opengraphics.org/tiki-index.php">wiki.opengraphics.org</a></span> at the <a href="Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (archived June 9, 2010)</td></tr></tbody></table>

<p>The <b>Open Graphics Project</b> (<b>OGP</b>) was founded with the goal to design an <a href="Open-source_hardware" title="Open-source hardware">open-source hardware</a> / <a href="Open_architecture" title="Open architecture">open architecture</a> and standard for <a href="Graphics_card" title="Graphics card">graphics cards</a>, primarily targeting <a href="Free_software" title="Free software">free software</a> / <a href="Open-source_model" class="mw-redirect" title="Open-source model">open-source</a> operating systems. The project created a reprogrammable development and prototyping board and had aimed to eventually produce a full-featured and competitive end-user graphics card.

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<p>The project's first product was a <a href="Peripheral_Component_Interconnect" title="Peripheral Component Interconnect">PCI</a> graphics card dubbed OGD1, which used a <a href="Field-programmable_gate_array" title="Field-programmable gate array">field-programmable gate array</a> (FPGA) chip. Although the card did not have the same level of performance or functionality as graphics cards on the market at the time, it was intended to be useful as a tool for prototyping the project's first <a href="Application-specific_integrated_circuit" title="Application-specific integrated circuit">application-specific integrated circuit</a> (ASIC) board, as well as for other professionals needing programmable graphics cards or FPGA-based prototyping boards. It was also hoped that this prototype would attract enough interest to gain some profit and attract investors for the next card, since it was expected to cost around US$2,000,000 to start the production of a specialized ASIC design. <a href="PCI_Express" title="PCI Express">PCI Express</a> and/or <a href="Mini-PCI" class="mw-redirect" title="Mini-PCI">Mini-PCI</a> variations were planned to follow. The OGD1 began shipping in September 2010,<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> some six years after the project began and 3 years after the appearance of the first prototypes.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>

</p><p>Full specifications will be published and open-source <a href="Device_driver" title="Device driver">device drivers</a> will be released. All <a href="Register_transfer_level" class="mw-redirect" title="Register transfer level">RTL</a> will be released. Source code to the device drivers and <a href="BIOS" title="BIOS">BIOS</a> will be released under the <a href="MIT_License" title="MIT License">MIT</a> and <a href="BSD_licenses" title="BSD licenses">BSD licenses</a>. The RTL (in <a href="Verilog" title="Verilog">Verilog</a>) used for the FPGA and the RTL used for the ASIC are planned to be released under the <a href="GNU_General_Public_License" title="GNU General Public License">GNU General Public License</a> (GPL).

</p><p>It has 256 <a href="MiB" class="mw-redirect" title="MiB">MiB</a> of DDR RAM, is passively cooled, and follows the <a href="Display_Data_Channel" title="Display Data Channel">DDC</a>, <a href="Extended_display_identification_data" class="mw-redirect" title="Extended display identification data">EDID</a>, <a href="VESA_Display_Power_Management_Signaling" title="VESA Display Power Management Signaling">DPMS</a> and <a href="VESA_BIOS_Extensions" title="VESA BIOS Extensions">VBE</a> VESA standards. <a href="TV-out" title="TV-out">TV-out</a> is also planned.

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<div class="mw-heading mw-heading3"><h3 id="Versioning_schema">Versioning schema</h3></div>

<p>Versioning schema for OGD1 will go like this:

</p><p>{Root Number} – {Video Memory}{Video Output Interfaces}{Special Options e.g.: A1 OGA firmware installed}

</p>

<th>Field

</th>

<th>Example Value

</th>

<th>Example Description

</th></tr>

<tr>

<td>Root number

</td>

<td>OGD1P-

</td>

<td>OGD1 board with PCI Bus

</td></tr>

<tr>

<td>Video memory

</td>

<td>256

</td>

<td>256 MiB

</td></tr>

<tr>

<td colspan="3"><i>Video outputs, in order, skip any not installed</i>

</td></tr>

<tr>

<td>First interface

</td>

<td>D

</td>

<td>Dual-link DVI

</td></tr>

<tr>

<td>Second interface

</td>

<td>D

</td>

<td>Dual-link DVI

</td></tr>

<tr>

<td>Third interface

</td>

<td>A

</td>

<td>Analog video, 75 ohm, VGA compatible

</td></tr>

<tr>

<td>Fourth interface

</td>

<td>V

</td>

<td>TV video

</td></tr>

<tr>

<td colspan="3"><i>Special options, in alphanumeric order, each preceded by a dash</i>

</td></tr>

<tr>

<td>Factory firmware-RTL

</td>

<td>A1

</td>

<td>OGA1 Firmware

</td></tr></tbody></table>

<div class="mw-heading mw-heading3"><h3 id="OGD1_components">OGD1 components</h3></div>

<p>Main components of OGD1 graphics card (shown on the picture)<sup id="cite_ref-ogd1-map-guide_3-0" class="reference"><a href="#cite_note-ogd1-map-guide-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup>

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<dl><dd>A) <a href="Digital_Visual_Interface" title="Digital Visual Interface">DVI</a> transmitter pair A</dd>

<dd>B) DVI transmitter pair B</dd>

<dd>C) 330MHz triple 10-bit <a href="Digital-to-analog_converter" title="Digital-to-analog converter">DAC</a> (behind)</dd>

<dd>E) 2x4 256 megabit <a href="DDR_SDRAM" title="DDR SDRAM">DDR SDRAM</a> (front, behind)</dd>

<dd>F) <a href="Xilinx" title="Xilinx">Xilinx</a> 3S4000 <a href="Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a> (main chip)</dd>

<dd>G) <a href="Lattice_Semiconductor" title="Lattice Semiconductor">Lattice</a> XP10 FPGA (host interface)</dd>

<dd>H) SPI <a href="Programmable_read-only_memory" class="mw-redirect" title="Programmable read-only memory">PROM</a> 1 <a href="Mebibit" class="mw-redirect" title="Mebibit">Mibit</a></dd>

<dd>J) SPI PROM 16 Mibit</dd>

<dd>K) 3x 500 MHz DACs (optional)</dd>

<dd>L) 64-bit <a href="PCI-X" title="PCI-X">PCI-X</a> edge connector</dd>

<dd>M) <a href="DVI-I" class="mw-redirect" title="DVI-I">DVI-I</a> connector A and connector B</dd>

<dd>N) <a href="S-Video" title="S-Video">S-Video</a> connector</dd>

<dd>O) 100-pin expansion bus connector</dd></dl>

<div class="mw-heading mw-heading2"><h2 id="Divisions/terms_related_to_OGP">Divisions/terms related to OGP</h2></div>

<dl><dt>Open Graphics Project (OGP)</dt>

<dd>The group of people developing OGA, its written documentation, and its products.</dd>

<dt>Open Graphics Architecture (OGA)</dt>

<dd>The trade name for open graphics architectures specified by the Open Graphics Project.</dd>

<dt>Open Graphics Development (OGD)</dt>

<dd>The initial FPGA-based experimentation board used as a test platform for TRV ASICs.</dd>

<dt>Traversal Technology (TRV)</dt>

<dd>The commercial name for the first ASIC products, based on the Open Graphics Architecture.</dd>

<dt>Open Graphics Card (OGC)</dt>

<dd>Graphics cards based on TRV chips.</dd>

<dt>Open Hardware Foundation (OHF)</dt>

<dd>A non-profit corporation whose charter is to promote the design and production of open-source and open-documentation hardware.</dd></dl>

<div class="mw-heading mw-heading2"><h2 id="Current_status">Current status</h2></div>

<p>The OGP project failed to gain the necessary funding to produce an ASIC version of its card. The project appears to have been discontinued in 2011.

</p>

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<ul><li><a href="Graphics_hardware_and_FOSS" class="mw-redirect" title="Graphics hardware and FOSS">Graphics hardware and FOSS</a></li>

<li><a href="Open-source_hardware" title="Open-source hardware">Open-source hardware</a></li>

<li><a href="Open_system_(computing)" title="Open system (computing)">Open system (computing)</a></li>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20170615123107/http://lists.duskglow.com/open-graphics/2010-September/012160.html">"OGD1's Now Available!"</a>. Archived from <a rel="nofollow" class="external text" href="http://lists.duskglow.com/open-graphics/2010-September/012160.html">the original</a> on 15 June 2017<span class="reference-accessdate">. Retrieved <span class="nowrap">12 January</span> 2017</span>.</cite></span>

</li>

<li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070115142617/http://www.theinquirer.net/default.aspx?article=36761">"First Open Graphics board appears"</a>. The Inquirer. Archived from <a rel="nofollow" class="external text" href="http://www.theinquirer.net/default.aspx?article=36761">the original</a> on 15 January 2007.</cite></span>

</li>

<cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070927065410/http://wiki.duskglow.com/tiki-page.php?pageName=OGD1_Map_Guide">"OGD1 map guide"</a>. Open Graphics wiki. Archived from <a rel="nofollow" class="external text" href="http://wiki.duskglow.com/tiki-page.php?pageName=OGD1_Map_Guide">the original</a> on 27 September 2007<span class="reference-accessdate">. Retrieved <span class="nowrap">4 September</span> 2006</span>.</cite></span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20100609075313/http://wiki.opengraphics.org/tiki-index.php">The official Open Graphics wiki</a> archived at the <a href="Wayback_Machine" title="Wayback Machine">Wayback Machine</a> June 9, 2010</li>

<li><cite id="CITEREFJeremy_Andrews2006" class="citation news cs1">Jeremy Andrews (1 March 2006). <a rel="nofollow" class="external text" href="http://kerneltrap.org/node/6272">"Hardware: Open Graphics Development Board Pricing"</a>. <a href="KernelTrap" title="KernelTrap">KernelTrap</a><span class="reference-accessdate">. Retrieved <span class="nowrap">4 September</span> 2006</span>.</cite></li>

<li><a rel="nofollow" class="external text" href="http://www.wacco.mveas.com/projectvga.php">Project VGA</a> – another free graphics core project, aiming at cheaper hardware</li>

<li><a rel="nofollow" class="external text" href="http://icculus.org/manticore/">Manticore</a> – an older FPGA-based free graphics core implementation. As of 2009-05-04 no source is available.</li>

<li>The master thesis "<a rel="nofollow" class="external text" href="http://liu.diva-portal.org/smash/record.jsf?pid=diva2:20165">An FPGA-based 3D Graphics System</a>" illustrates very well the design decisions to make, while developing a FPGA-based 3D graphics core.</li>

<li>The master thesis "<a rel="nofollow" class="external text" href="https://web.archive.org/web/20110727083331/http://www.milkymist.org/thesis/thesis.pdf">A performance-driven SoC architecture for video synthesis</a>" gives a more complete and hands-on approach of some aspects.</li></ul></div><div><div class="zim-footer">

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